ISTNanosat-1 High Power Processor

cubesat.jpg: 350x214, 19k (January 23, 2013, at 04:15 PM)


  • Name: Tiago Alexandre Vicente dos Santos Carvalho
  • Number: 74076
  • Email: ou


  • Rui M. Rocha
  • Moisés Piedade
  • Mariano Gonçalves
  • AMRAD support


The Portuguese Space Center, combining scientific interests of IST and AMRAD, comes to potentiate applications, either through tracking and terrestrial exploration of multiple satellites, and also by the study, construction, launch and operation of sub-orbital systems developed and produced locally. It is in this context that new approaches begin to be explored, which aim to build an educational satellite (ISTNanosat-1), a competitor to QB50 European project, capable of transporting new challenges and applications. The process of building a satellite, even a CubeSat, is a complicated and challenging task simultaneously. A CubeSat, of the kind that we intend to launch, has several systems from the transponders to the supply system. One of the important systems is the processing card with high capacity to handle all functions that require heavy processing, in particular related to the attitude control of the satellite or digital communications.


It is intended to construct a payload of a basic CubeSat with evolved processing capabilities and attitude control. The need to process data from sensors in attitude (eg horizon, the Sun's position, anti-tumble) or specialized (eg camera, GPS) or digital data through specific protocols, requires a system based on a powerful processor (eg ARM Cortex M3) with memory capacity and appropriate interfaces. The operating system is also an important aspect, being able to use Linux or even Android. The minimum payload will be tested at the end of the project by launching a balloon to simulate the minimum operation in flight.


A CubeSat project is attractive, very challenging and most of all, is feasible in an academic point of view. These are the reasons why it is so widely adopted by many universities around the world. Space exploration is a dream of humanity for many centuries turned into reality just a few decades ago. Nowadays, it is possible to develop small and cheap satellites that make this dream possible. New generations of picosatellites are capable of running advanced experiments in a low earth orbit with reduced cost. This document reports a proposal of a CubeSat subsystem, which performs a centralized processing unit, with evolved capabilities taking the advantage of the present low power consumption paradigm, explored by so many other electronic applications. High Power Processor has to store and process communication, command and housekeeping data in a very efficient and reliable way since power budget and available space are reduced. Joining this facts, cheap commercial components will be used, emphasizing the need of robustness. In order to be stackable with other subsystems, all components will be placed over a PC/104 compatible PCB. The challenges are many. From accomplish the mentioned requirements, passing through the handling of faulty situations caused by eminent radiation until the potentially obstacles in software development, there are several barriers to surpass.

Keywords: CubeSat, ISTNanosat, Embedded Systems, Low Power Consumption

Goals and motivation

The CubeSat project allows everyone involved, especially students, to (partially) build and fly a spacecraft within their academic lifetimes. This fact introduces even more ambition to the project that can be translated in future technologic innovations. Additionally, participating in this type of projects, the student is trained in a solid set of disciplines, which is an important fact for every entity involved. Since the success rate of CubeSat missions is about 50%, the main objective of this project is the development of an efficient, robust and reliable processing subsystem. The space aboard and the power budget are reduced, which means that extra hardware used for redundancy must be streamlined, emphasizing the importance of robustness and the searching for alternative solutions such as error detection and correction, as well as a very reliable real time operating system.


This work will involve:

  • Card processing requirements analysis.
  • Study of the board architecture and its interfaces;
  • Developing solution (prototype);
  • Testing and demonstration in a real environment.


Current status: Researching
Active period: Set. 2012 - Oct. 2013
GEMS team: Tiago Carvalho